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DATE
2004
IEEE
168views Hardware» more  DATE 2004»
15 years 1 months ago
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and inte...
Ingrid Verbauwhede, Patrick Schaumont, Christian P...
TVLSI
2008
133views more  TVLSI 2008»
14 years 9 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
15 years 1 months ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
FPL
2003
Springer
95views Hardware» more  FPL 2003»
15 years 2 months ago
Reconfigurable Hardware SAT Solvers: A Survey of Systems
By adapting to computations that are not so well supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. Such computational sy...
Iouliia Skliarova, António de Brito Ferrari
FPL
2006
Springer
147views Hardware» more  FPL 2006»
15 years 1 months ago
Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration
A secure content distribution system is prototyped based on run-time partial reconfigurability of an FPGA. The system provides a robust content protection scheme for online conten...
Yohei Hori, Hiroyuki Yokoyama, Kenji Toda