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IEICET
2006
56views more  IEICET 2006»
14 years 9 months ago
Reconfiguration Heuristics for Logical Topologies in Wide-Area WDM Networks
Abstract--We propose several heuristic algorithms that reconfigure logical topologies in wide-area wavelength-routed optical networks. Our reconfiguration algorithms attempt to kee...
Hironao Takagi, Yongbing Zhang, Hideaki Takagi
IPPS
2003
IEEE
15 years 2 months ago
Targeting Tiled Architectures in Design Exploration
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas...
ERSA
2009
185views Hardware» more  ERSA 2009»
14 years 7 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl
ISSS
2002
IEEE
174views Hardware» more  ISSS 2002»
15 years 2 months ago
A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
Carles Rodoreda Sala, Natalino G. Busá
ARC
2010
Springer
126views Hardware» more  ARC 2010»
14 years 7 months ago
Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip
The SIMD parallel systems play a crucial role in the field of intensive signal processing. For most the parallel systems, communication networks are considered as one of the challe...
Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyse...