Sciweavers

140 search results - page 3 / 28
» Reconfigurable Systems Enabled by a Network-on-Chip
Sort
View
79
Voted
FCCM
1997
IEEE
129views VLSI» more  FCCM 1997»
15 years 1 months ago
The Chimaera reconfigurable functional unit
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jef...
IPPS
1998
IEEE
15 years 1 months ago
A Java Development and Runtime Environment for Reconfigurable Computing
Fast runtime reconfigurable hardware enables system designers to swap hardware into and out of an FPGA much as the pages of virtual memory are swapped into and out of virtual memor...
Don Davis, Michael Barr, Toby Bennett, Stephen Edw...
JSA
2002
130views more  JSA 2002»
14 years 9 months ago
Reconfigurable models of finite state machines and their implementation in FPGAs
This paper examines some models of FSMs that can be implemented in dynamically and statically reconfigurable FPGAs. They enable circuits for the FSMs to be constructed in such a wa...
Valery Sklyarov
91
Voted
ERSA
2004
134views Hardware» more  ERSA 2004»
14 years 11 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
DAGSTUHL
2006
14 years 11 months ago
Physical 2D Morphware and Power Reduction Methods for Everyone
Dynamic and partial reconfiguration discovers more and more the focus in academic and industrial research. Modern systems in e.g. avionic and automotive applications exploit the p...
Jürgen Becker, Michael Hübner, Katarina ...