26 search results - page 4 / 6 » Reconfigurable synchronized dataflow processor |
DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
In this paper, we show the necessity of reconfigurable hardware for data and signal processing in wireless mobile terminals. We first identify the key processing power requirement...
EMSOFT
2010
Springer
14 years 7 months ago
2010
Springer
We propose a technique to automatically synthesize programs and schedules for hard real-time distributed (embedded) systems from synchronous data-flow models. Our technique connec...
IEEEPACT
1999
IEEE
15 years 1 months ago
1999
IEEE
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
CORR
2010
Springer
14 years 9 months ago
2010
Springer
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
ARC
2010
Springer
15 years 25 days ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...