Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Rapid developments in digital technologies have brought to force new challenges in innovation. In this paper, we propose a taxonomic framework of innovation networks in order to i...
Youngjin Yoo, Kalle Lyytinen, Richard J. Boland Jr...
Shrinking transistor sizes and a trend toward low-power processors have caused increased leakage, high per-device variation and a larger number of hard and soft errors. Maintainin...
Protocol reverse engineering is the process of extracting application-level specifications for network protocols. Such specifications are very helpful in a number of security-re...
Gilbert Wondracek, Paolo Milani Comparetti, Christ...
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...