64 search results - page 7 / 13 » Reducing Boarding Time: Synthesis of Improved Genetic Algori... |
SIES
2007
IEEE
15 years 3 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
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ICCAD
2010
IEEE
14 years 7 months ago
2010
IEEE
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
BMCBI
2007
14 years 9 months ago
2007
Background: Peptide ligands have tremendous therapeutic potential as efficacious drugs. Currently, more than 40 peptides are available in the market for a drug. However, since cos...
GECCO
2008
Springer
14 years 10 months ago
2008
Springer
Based in part on observations about the incremental nature of most state changes in biological systems, we introduce the idea of Memory with Memory in Genetic Programming (GP), wh...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...