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85
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HPCA
2004
IEEE
16 years 2 hour ago
Reducing Branch Misprediction Penalty via Selective Branch Recovery
Branch misprediction penalty consists of two components: the time wasted on mis-speculative execution until the mispredicted branch is resolved and the time to restart the pipelin...
Amit Gandhi, Haitham Akkary, Srikanth T. Srinivasa...
77
Voted
HIPEAC
2007
Springer
15 years 5 months ago
Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling
Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, C...
IPPS
2005
IEEE
15 years 5 months ago
Control-Flow Independence Reuse via Dynamic Vectorization
Current processors exploit out-of-order execution and branch prediction to improve instruction level parallelism. When a branch prediction is wrong, processors flush the pipeline ...
Alex Pajuelo, Antonio González, Mateo Valer...
85
Voted
MICRO
1999
IEEE
104views Hardware» more  MICRO 1999»
15 years 3 months ago
Control Independence in Trace Processors
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
Eric Rotenberg, James E. Smith
98
Voted
APCSAC
2006
IEEE
15 years 5 months ago
Using Branch Prediction Information for Near-Optimal I-Cache Leakage
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the perform...
Sung Woo Chung, Kevin Skadron