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» Reducing Compilation Time Overhead in Compiled Simulators
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ACSAC
2006
IEEE
15 years 3 months ago
Address Space Layout Permutation (ASLP): Towards Fine-Grained Randomization of Commodity Software
Address space randomization is an emerging and promising method for stopping a broad range of memory corruption attacks. By randomly shifting critical memory regions at process in...
Chongkyung Kil, Jinsuk Jun, Christopher Bookholt, ...
IEEEPACT
2002
IEEE
15 years 2 months ago
Eliminating Exception Constraints of Java Programs for IA-64
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komats...
DAC
2002
ACM
15 years 10 months ago
An energy saving strategy based on adaptive loop parallelization
In this paper, we evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using different number of processors if doing so is be...
Ismail Kadayif, Mahmut T. Kandemir, Mustafa Karak&...
ICCD
2002
IEEE
88views Hardware» more  ICCD 2002»
15 years 6 months ago
Improving Processor Performance by Simplifying and Bypassing Trivial Computations
During the course of a program’s execution, a processor performs many trivial computations; that is, computations that can be simplified or where the result is zero, one, or equ...
Joshua J. Yi, David J. Lilja
IPPS
2009
IEEE
15 years 4 months ago
Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic