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» Reducing Design Complexity of the Load Store Queue
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74
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ISCA
2000
IEEE
99views Hardware» more  ISCA 2000»
15 years 1 months ago
Transient fault detection via simultaneous multithreading
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
Steven K. Reinhardt, Shubhendu S. Mukherjee
ISCA
1995
IEEE
120views Hardware» more  ISCA 1995»
15 years 1 months ago
Streamlining Data Cache Access with Fast Address Calculation
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
114
Voted
ISEMANTICS
2010
14 years 8 months ago
An evaluation of approaches to federated query processing over linked data
The Web has evolved from a global information space of linked documents to a web of linked data. The Web of Data enables answering complex, structured queries that could not be an...
Peter Haase, Tobias Mathäß, Michael Zil...
WSC
1994
14 years 10 months ago
General purpose simulation with stroboscope
Stroboscope is a programming language designed for the simulation of processes common to construction engineering. These processes are very complex and involve many different type...
Julio C. Martínez, Photios G. Ioannou
GLVLSI
2005
IEEE
122views VLSI» more  GLVLSI 2005»
15 years 3 months ago
Thermal aware cell-based full-chip electromigration reliability analysis
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-ba...
Syed M. Alam, Donald E. Troxel, Carl V. Thompson