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ISPASS
2005
IEEE
15 years 3 months ago
Partitioning Multi-Threaded Processors with a Large Number of Threads
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...
Ali El-Moursy, Rajeev Garg, David H. Albonesi, San...
76
Voted
RECOSOC
2007
118views Hardware» more  RECOSOC 2007»
14 years 11 months ago
A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems
Electronic equipments with higher performance, lower power consumption, and smaller size motivate the research for more efficient design methods. Platform-based design is a method...
Leandro Möller, Ismael Grehs, Ewerson Carvalh...
ICS
2004
Tsinghua U.
15 years 2 months ago
Cluster prefetch: tolerating on-chip wire delays in clustered microarchitectures
The growing dominance of wire delays at future technology points renders a microprocessor communication-bound. Clustered microarchitectures allow most dependence chains to execute...
Rajeev Balasubramonian
SIGMOD
2008
ACM
169views Database» more  SIGMOD 2008»
15 years 9 months ago
MCDB: a monte carlo approach to managing uncertain data
To deal with data uncertainty, existing probabilistic database systems augment tuples with attribute-level or tuple-level probability values, which are loaded into the database al...
Ravi Jampani, Fei Xu, Mingxi Wu, Luis Leopoldo Per...
ISCA
2011
IEEE
271views Hardware» more  ISCA 2011»
14 years 1 months ago
CRIB: consolidated rename, issue, and bypass
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
Erika Gunadi, Mikko H. Lipasti