Sciweavers

3702 search results - page 30 / 741
» Reducing Misclassification Costs
Sort
View
125
Voted
KIVS
1999
Springer
15 years 6 months ago
Strategies for Minimizing the Average Cost of Paging on the Air Interface
: Location Management of mobile users in a cellular network covers tracking and paging (searching) functionality. In this paper a sequential search strategy is proposed which reduc...
Dogan Kesdogan, Andrei Trofimov, Dirk Trossen
117
Voted
ASAP
2006
IEEE
127views Hardware» more  ASAP 2006»
15 years 3 months ago
A Cost Effective Pipelined Divider for Double Precision Floating Point Number
Abstract--The growth of high-performance application in computer graphics, signal processing and scientific computing is a key driver for high performance, fixed latency, pipelined...
Sandeep B. Singh, Jayanta Biswas, S. K. Nandy
DAC
2005
ACM
15 years 3 months ago
Multiplexer restructuring for FPGA implementation cost reduction
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
Paul Metzgen, Dominic Nancekievill
ISCAS
2002
IEEE
92views Hardware» more  ISCAS 2002»
15 years 6 months ago
Low cost floating-point unit design for audio applications
This paper presents a low-cost, single-cycle floating-point unit developed for digital audio processing applications. In the unit, the serial steps of floating-point operations ar...
Sung-Won Lee, In-Cheol Park
112
Voted
IWNAS
2006
IEEE
15 years 7 months ago
A Fast Read/Write Process to Reduce RDMA Communication Latency
RDMA reduces network latency by eliminating unnecessary copies from network interface cards to application buffers, but how to reduce memory registration cost is a challenge. Prev...
Li Ou, Jizhong Han