Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
Asit K. Mishra, Reetuparna Das, Soumya Eachempati,...
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
The growing popularity of ad hoc networks is making their limitations, such as bandwidth and power restrictions, more apparent. As a result, techniques that reduce power consumpti...
This paper presents a Connectivity based Partition Approach (CPA) to reduce the energy consumption of a sensor network by sleep scheduling among sensor nodes. CPA partitions sensor...
Abstract— Solar powered WLAN infrastructure is a cost effective option in outdoor deployments where continuous power sources are not practical. In these nodes the cost of the sol...
Enrique J. Vargas, Amir A. Sayegh, Terence D. Todd