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» Reducing Power Consumption in Backbone Networks
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ASMTA
2010
Springer
192views Mathematics» more  ASMTA 2010»
14 years 7 months ago
Packet Loss Minimization in Load-Balancing Switch
Due to the overall growing demand on the network resources and tight restrictions on the power consumption, the requirements to the long-term scalability, cost and performance capa...
Yury Audzevich, Levente Bodrog, Yoram Ofek, Mikl&o...
ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
15 years 3 months ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
15 years 3 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
MOBICOM
2010
ACM
14 years 10 months ago
Bartendr: a practical approach to energy-aware cellular data scheduling
Cellular radios consume more power and suffer reduced data rate when the signal is weak. According to our measurements, the communication energy per bit can be as much as 6x highe...
Aaron Schulman, Vishnu Navda, Ramachandran Ramjee,...
ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
15 years 3 months ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir