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» Reducing Power in High-Performance Microprocessors
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CGF
2007
128views more  CGF 2007»
14 years 9 months ago
Stackless KD-Tree Traversal for High Performance GPU Ray Tracing
Significant advances have been achieved for realtime ray tracing recently, but realtime performance for complex scenes still requires large computational resources not yet availa...
Stefan Popov, Johannes Günther, Hans-Peter Se...
77
Voted
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
14 years 7 months ago
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
Emerging non-volatile memory technologies such as phase change memory (PCM) promise to increase storage system performance by a wide margin relative to both conventional disks and ...
Adrian M. Caulfield, Arup De, Joel Coburn, Todor I...
ISCAS
2005
IEEE
108views Hardware» more  ISCAS 2005»
15 years 3 months ago
Noise coupling in multi-voltage power distribution systems with decoupling capacitors
— Multiple power supply voltages are often used in modern high performance ICs such as microprocessors to decrease power consumption without affecting circuit speed. The system o...
Mikhail Popovich, Eby G. Friedman
ICS
2009
Tsinghua U.
15 years 2 months ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
ICCAD
2002
IEEE
163views Hardware» more  ICCAD 2002»
15 years 6 months ago
Sub-90nm technologies: challenges and opportunities for CAD
Future high performance microprocessor design with technology scaling beyond 90nm will pose two major challenges: (1) energy and power, and (2) parameter variations. Design practi...
Tanay Karnik, Shekhar Borkar, Vivek De