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» Reducing Power in High-Performance Microprocessors
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EUROPAR
1999
Springer
15 years 1 months ago
An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors
Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism ILP techniques that are traditionally used in high perform...
Daniel A. Connors, Jean-Michel Puiatti, David I. A...
ISLPED
2003
ACM
113views Hardware» more  ISLPED 2003»
15 years 2 months ago
Reducing power density through activity migration
Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Exc...
Seongmoo Heo, Kenneth C. Barr, Krste Asanovic
DAC
2003
ACM
15 years 10 months ago
Parameter variations and impact on circuits and microarchitecture
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
Shekhar Borkar, Tanay Karnik, Siva Narendra, James...
EUROPAR
2004
Springer
15 years 1 months ago
Imprecise Exceptions in Distributed Parallel Components
Abstract. Modern microprocessors have sacrificed the exactness of exceptions for improved performance long ago. This is a side effect of reordering instructions so that the micropr...
Kostadin Damevski, Steven G. Parker
TVLSI
2008
153views more  TVLSI 2008»
14 years 9 months ago
Characterization of a Novel Nine-Transistor SRAM Cell
Data stability of SRAM cells has become an important issue with the scaling of CMOS technology. Memory banks are also important sources of leakage since the majority of transistors...
Zhiyu Liu, Volkan Kursun