287 search results - page 19 / 58 » Reducing Power in High-Performance Microprocessors |
ICCD
2007
IEEE
15 years 1 months ago
2007
IEEE
Prior work has shown that collapsible pipelining techniques have the potential to significantly reduce clocking activity, which can consume up to 70% of the dynamic power in moder...
HPCA
2002
IEEE
15 years 10 months ago
2002
IEEE
As the power consumption of modern highperformance microprocessors increases beyond 100W, power becomes an increasingly important design consideration. This paper presents a novel...
PACS
2004
Springer
15 years 3 months ago
2004
Springer
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
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ASPLOS
2008
ACM
14 years 11 months ago
2008
ACM
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
EUROMICRO
1997
IEEE
15 years 1 months ago
1997
IEEE
Two years ago [3] we began to study a R.I.S.C. approachfor smart card microprocessors. We reconsider this research to answer the question of the new technology of smart cards: the...