287 search results - page 27 / 58 » Reducing Power in High-Performance Microprocessors |
93
Voted
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
: Static energy dissipation in cache memories will constitute an increasingly larger portion of total microprocessor energy dissipation due to nanoscale technology characteristics ...
73
Voted
VLSID
2000
IEEE
15 years 2 months ago
2000
IEEE
A methodology for reducing ground bounce in typical microprocessors and image processing architectures has been described. As we approach Gigascale Integration, chip power consump...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Ignoring the effect of simultaneous switching for logic gates causes silicon failures for high performance microprocessor designs. The main reason to omit this effect is the run...
75
Voted
ICS
2004
Tsinghua U.
15 years 3 months ago
2004
Tsinghua U.
The growing dominance of wire delays at future technology points renders a microprocessor communication-bound. Clustered microarchitectures allow most dependence chains to execute...
ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
We introduce and analyze the ground bounce due to power mode transition in power gating structures. To reduce the ground bounce, we propose novel power gating structures in which ...