287 search results - page 42 / 58 » Reducing Power in High-Performance Microprocessors |
71
Voted
DAC
2004
ACM
15 years 10 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
72
Voted
ICCAD
2007
IEEE
15 years 6 months ago
2007
IEEE
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
84
Voted
DAC
2004
ACM
15 years 1 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...