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» Reducing Power in High-Performance Microprocessors
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PACS
2000
Springer
99views Hardware» more  PACS 2000»
15 years 1 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
HIPEAC
2007
Springer
15 years 3 months ago
Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems
Voltage scaling reduces leakage power for cache lines unlikely to be referenced soon. Partitioning reduces dynamic power via smaller, specialized structures. We combine approaches,...
Major Bhadauria, Sally A. McKee, Karan Singh, Gary...
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SC
2005
ACM
15 years 3 months ago
A Power-Aware Run-Time System for High-Performance Computing
For decades, the high-performance computing (HPC) community has focused on performance, where performance is defined as speed. To achieve better performance per compute node, mic...
Chung-Hsing Hsu, Wu-chun Feng
CBMS
2009
IEEE
15 years 4 months ago
Lessons learned in developing a low-cost high performance medical imaging cluster
This paper explores the usefulness of the Sony PlayStation 3 R (PS3) for medical image processing. Medical image processing often entails dealing with a large number of high resol...
Kirt D. Lillywhite, Dah-Jye Lee, Sameer Antani, Do...
ISPASS
2006
IEEE
15 years 3 months ago
Automatic testcase synthesis and performance model validation for high performance PowerPC processors
The latest high-performance IBM PowerPC microprocessor, the POWER5 chip, poses challenges for performance model validation. The current stateof-the-art is to use simple hand-coded...
Robert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John,...