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» Reducing SoC Simulation and Development Time
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75
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WSC
1998
14 years 10 months ago
Effective Simulation Model Reuse: a case study for AMHS modeling
The application of simulation as a performance estimation tool in automated material handling system design is well documented, as is the amount of time required to build, debug, ...
Gerald T. Mackulak, Frederick P. Lawrence, Theron ...
86
Voted
FPGA
2003
ACM
116views FPGA» more  FPGA 2003»
15 years 2 months ago
Hardware-assisted simulated annealing with application for fast FPGA placement
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
Michael G. Wrighton, André DeHon
IPSN
2009
Springer
15 years 4 months ago
Improving the speed and scalability of distributed simulations of sensor networks
Distributed simulation techniques are commonly used to improve the speed and scalability of wireless sensor network simulators. However, accurate simulations of dynamic interactio...
Zhong-Yi Jin, Rajesh K. Gupta
163
Voted

Publication
165views
13 years 3 months ago
Task scheduling algorithm for multicore processor system for minimizing recovery time in case of single node fault
In this paper, we propose a task scheduling algorithm for a multicore processor system which reduces the recovery time in case of a single fail-stop failure of a multicore processo...
Shohei Gotoda, Naoki Shibata and Minoru Ito

Presentation
324views
13 years 3 months ago
Task scheduling algorithm for multicore processor system for minimizing recovery time in case of single node fault
In this paper, we propose a task scheduling al-gorithm for a multicore processor system which reduces the recovery time in case of a single fail-stop failure of a multicore process...