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» Reducing SoC Simulation and Development Time
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FCCM
1999
IEEE
210views VLSI» more  FCCM 1999»
15 years 3 months ago
Algorithm Analysis and Mapping Environment for Adaptive Computing Systems: Further Results
Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our ...
Eric K. Pauer, Paul D. Fiore, John M. Smith
INFOCOM
2005
IEEE
15 years 4 months ago
Credit based fair scheduling for packet switched networks
With the rapid development of Internet multimedia applications, the next generation of networks is required to schedule not only the best effort traffic but also the traffic wit...
Deng Pan, Yuanyuan Yang
ITC
2003
IEEE
139views Hardware» more  ITC 2003»
15 years 4 months ago
Fault Pattern Oriented Defect Diagnosis for Memories
Failure analysis (FA) and diagnosis of memory cores plays a key role in system-on-chip (SOC) product development and yield ramp-up. Conventional FA based on bitmaps and the experi...
Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung...
VTC
2006
IEEE
15 years 5 months ago
Reduction of Amplitude Clipping Level with OFDM/TDM
—The OFDM signals have a problem of high peak-to-average power ratio (PAPR). Hence, a large transmit-power backoff or amplitude clipping is required. The amplitude clipping cause...
Haris Gacanin, Shinsuke Takaoka, Fumiyuki Adachi
ICPPW
2005
IEEE
15 years 4 months ago
Performance Prophet: A Performance Modeling and Prediction Tool for Parallel and Distributed Programs
High-performance computing is essential for solving large problems and for reducing the time to solution for a single problem. Current top high-performance computing systems conta...
Sabri Pllana, Thomas Fahringer