253 search results - page 4 / 51 » Reducing SoC Simulation and Development Time |
MICRO
1997
IEEE
15 years 1 months ago
1997
IEEE
The multicluster architecture that we introduce offers a decentralized, dynamically-scheduled architecture, in which the register files, dispatch queue, and functional units of t...
69
Voted
TVLSI
2008
14 years 9 months ago
2008
Lifetime concerns for complex systems-on-a-chip (SoC) designs due to decreasing levels in reliability motivate the development of solutions to ensure reliable operation. A precurso...
SERP
2004
14 years 10 months ago
2004
Game and simulation development is a difficult process because there are many low level infrastructure concerns that need to be addressed. This is a barrier to development for ine...
CASES
2001
ACM
15 years 1 months ago
2001
ACM
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
87
Voted
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...