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» Reducing SoC Simulation and Development Time
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WSC
2000
14 years 10 months ago
Improved decision processes through simultaneous simulation and time dilation
Simulation models are often not used to their full potential in the decision-making process. The default simulation strategy of simple serial replication of fixed length runs mean...
Paul Hyden, Lee Schruben
DAC
2003
ACM
15 years 2 months ago
4G terminals: how are we going to design them?
Fourth-generation wireless communication systems (4G) will have totally different requirements than what front-end designers have been coping with up to now. Designs must be targe...
Jan Craninckx, Stéphane Donnay
WOSP
2010
ACM
15 years 4 months ago
Reducing performance non-determinism via cache-aware page allocation strategies
Performance non-determinism in computer systems complicates evaluation, use, and even development of these systems. In performance evaluation via benchmarking and simulation, nond...
Michal Hocko, Tomás Kalibera
98
Voted
ITNG
2007
IEEE
15 years 3 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
WSC
2004
14 years 10 months ago
Two-Step 3-Dimensional Sketching Tool for New Product Development
This paper discusses a two-step virtual reality based conceptual design tool that enables industrial designers to create sketches of their ideas in 3-dimensional space in real tim...
Ali Akgunduz, Hang Yu