175 search results - page 11 / 35 » Reducing Synchronization Overhead in Parallel Simulation |
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GRID
2010
Springer
14 years 7 months ago
2010
Springer
Abstract The EGEE grid offers the necessary infrastructure and resources for reducing the running time of particle tracking Monte-Carlo applications like GATE. However, efforts are...
EWC
2008
14 years 9 months ago
2008
In parallel adaptive mesh refinement (AMR) computations the problem size can vary significantly during a simulation. The goal here is to explore the performance implications of dyn...
ICS
2009
Tsinghua U.
15 years 4 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
IFIP
2010
Springer
14 years 4 months ago
2010
Springer
Abstract. In this article, we present a flexible simulation environment for embedded real-time software refinement by a mixed level cosimulation. For this, ne the native speed of a...
MICRO
2010
IEEE
14 years 8 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...