Sciweavers

2 search results - page 1 / 1
» Reducing reorder buffer complexity through selective operand...
Sort
View
67
Voted
ISLPED
2003
ACM
91views Hardware» more  ISLPED 2003»
15 years 2 months ago
Reducing reorder buffer complexity through selective operand caching
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
IEEEPACT
2003
IEEE
15 years 2 months ago
Reducing Datapath Energy through the Isolation of Short-Lived Operands
We present a technique for reducing the power dissipation in the course of writebacks and committments in a datapath that uses a dedicated architectural register file (ARF) to hol...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...