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DATE
2009
IEEE
86views Hardware» more  DATE 2009»
16 years 25 days ago
A formal approach to design space exploration of protocol converters
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
Karin Avnit, Arcot Sowmya
ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
15 years 9 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
IEEEMM
2007
146views more  IEEEMM 2007»
15 years 6 months ago
Learning Microarray Gene Expression Data by Hybrid Discriminant Analysis
— Microarray technology offers a high throughput means to study expression networks and gene regulatory networks in cells. The intrinsic nature of high dimensionality and small s...
Yijuan Lu, Qi Tian, Maribel Sanchez, Jennifer L. N...
156
Voted
ACMACE
2008
ACM
15 years 8 months ago
Dimensionality reduced HRTFs: a comparative study
Dimensionality reduction is a statistical tool commonly used to map high-dimensional data into lower a dimensionality. The transformed data is typically more suitable for regressi...
Bill Kapralos, Nathan Mekuz, Agnieszka Kopinska, S...
TASLP
2010
148views more  TASLP 2010»
15 years 24 days ago
Batch and Adaptive PARAFAC-Based Blind Separation of Convolutive Speech Mixtures
We present a frequency-domain technique based on PARAllel FACtor (PARAFAC) analysis that performs multichannel blind source separation (BSS) of convolutive speech mixtures. PARAFAC...
Dimitri Nion, Kleanthis N. Mokios, Nicholas D. Sid...