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» Reducing the Complexity of Reductions
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ISCA
2006
IEEE
169views Hardware» more  ISCA 2006»
16 years 4 days ago
Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
Chuanjun Zhang
VTC
2007
IEEE
120views Communications» more  VTC 2007»
16 years 11 days ago
Soft Detection and Decoding of Clipped and Filtered COFDM Signals
— Clipping and filtering is an attractive method for the reduction of the PAPR of OFDM signals before transmission. However, the resulting distortion noise impacts the error rat...
Peter Zillmann, Wolfgang Rave, Gerhard Fettweis
DATE
2002
IEEE
120views Hardware» more  DATE 2002»
15 years 11 months ago
Wire Placement for Crosstalk Energy Minimization in Address Buses
We propose a novel approach to bus energy minimization that targets crosstalk effects. Unlike previous approaches, we try to reduce energy through capacitance optimization, by ad ...
Luca Macchiarulo, Enrico Macii, Massimo Poncino
ISMVL
1999
IEEE
133views Hardware» more  ISMVL 1999»
15 years 10 months ago
Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead
We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary m...
Andreas Herrfeld, Siegbert Hentschke
ANLP
2000
110views more  ANLP 2000»
15 years 7 months ago
Arabic Morphology Generation Using a Concatenative Strategy
Arabic inflectional morphology requires infixation, prefixation and suffixation, giving rise to a large space of morphological variation. In this paper we describe an approach to ...
Violetta Cavalli-Sforza, Abdelhadi Soudi, Teruko M...