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» Reducing the Complexity of Reductions
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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 10 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
IEEEPACT
2006
IEEE
16 years 5 days ago
Prematerialization: reducing register pressure for free
Modern compiler transformations that eliminate redundant computations or reorder instructions, such as partial redundancy elimination and instruction scheduling, are very effectiv...
Ivan D. Baev, Richard E. Hank, David H. Gross
ISLPED
1996
ACM
109views Hardware» more  ISLPED 1996»
15 years 10 months ago
Transition reduction in carry-save adder trees
-- By taking advantage of the redundancy in a 4-2 compressor, we reduce the number of transitions in carry-save adder trees that are common in large multipliers. Three new 4-2 comp...
Patrik Larsson, Chris J. Nicol
TON
2008
160views more  TON 2008»
15 years 6 months ago
Label space reduction in MPLS networks: how much can a single stacked label do?
Most network operators have considered reducing LSR label spaces (number of labels used) as a way of simplifying management of underlaying Virtual Private Networks (VPNs) and there...
Fernando Solano, Thomas Stidsen, Ramón Fabr...
STVR
2002
88views more  STVR 2002»
15 years 5 months ago
Empirical studies of test-suite reduction
Test-suite reduction techniques attempt to reduce the costs of saving and reusing test cases during software maintenance by eliminating redundant test cases from test suites. A po...
Gregg Rothermel, Mary Jean Harrold, Jeffery von Ro...