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FPL
2009
Springer
145views Hardware» more  FPL 2009»
15 years 2 months ago
Run-time Partial Reconfiguration speed investigation and architectural design space exploration
Run-time Partial Reconfiguration (PR) speed is significant in applications especially when fast IP core switching is required. In this paper, we propose to use Direct Memory Acce...
Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsc...
68
Voted
AAAI
2007
15 years 1 hour ago
Actively Exploring Creation of Face Space(s) for Improved Face Recognition
We propose a learning framework that actively explores creation of face space(s) by selecting images that are complementary to the images already represented in the face space. We...
Nitesh V. Chawla, Kevin W. Bowyer
61
Voted
GLOBECOM
2008
IEEE
15 years 4 months ago
Terabit Ethernet: A Time-Space Carrier Sense Multiple Access Method
To achieve Terabit and Petabit switching, both time (high transmission speed) and space (multi-stage interconnection network) technologies are required. We propose an Ethernet for...
Joseph Y. Hui, David A. Daniel
67
Voted
ESTIMEDIA
2006
Springer
15 years 1 months ago
A Mixed-level Co-simulation Method for System-level Design Space Exploration
The Sesame modeling and simulation framework aims at efficient system-level design space exploration of embedded multimedia systems. A primary objective of Sesame is the ion at mu...
Mark Thompson, Andy D. Pimentel, Simon Polstra, Ca...
ECBS
2007
IEEE
122views Hardware» more  ECBS 2007»
15 years 4 months ago
Time- and Space-Efficient Evaluation of Sparse Boolean Functions in Embedded Software
The paper addresses software implementation of large sparse systems of Boolean functions. Fast evaluation of such functions with the smallest memory consumption is often required ...
Vaclav Dvorak