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» Reducing the complexity of logics for multiagent systems
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DAC
2004
ACM
15 years 1 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
15 years 3 months ago
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
Alexandre M. Amory, Marcelo Lubaszewski, Fernando ...
ICCAD
2005
IEEE
90views Hardware» more  ICCAD 2005»
15 years 6 months ago
Scalable compositional minimization via static analysis
State-equivalence based reduction techniques, e.g. bisimulation minimization, can be used to reduce a state transition system to facilitate subsequent verification tasks. However...
Fadi A. Zaraket, Jason Baumgartner, Adnan Aziz
WISE
2005
Springer
15 years 3 months ago
Scalable Instance Retrieval for the Semantic Web by Approximation
Abstract. Approximation has been identified as a potential way of reducing the complexity of logical reasoning. Here we explore approximation for speeding up instance retrieval in...
Holger Wache, Perry Groot, Heiner Stuckenschmidt
ICS
2004
Tsinghua U.
15 years 3 months ago
Cluster prefetch: tolerating on-chip wire delays in clustered microarchitectures
The growing dominance of wire delays at future technology points renders a microprocessor communication-bound. Clustered microarchitectures allow most dependence chains to execute...
Rajeev Balasubramonian