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» Reducing the complexity of logics for multiagent systems
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AHS
2006
IEEE
142views Hardware» more  AHS 2006»
15 years 3 months ago
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an onchip pr...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yo...
ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
15 years 2 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
IPPS
2006
IEEE
15 years 3 months ago
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
Michael Hübner, Christian Schuck, Jürgen...
CASES
2005
ACM
14 years 11 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
DAC
1997
ACM
15 years 1 months ago
Static Timing Analysis of Embedded Software
This paper examines the problem of statically analyzing the performance of embedded software. This problem is motivated by the increasing growth of embedded systems and a lack of ...
Sharad Malik, Margaret Martonosi, Yau-Tsun Steven ...