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ISCAS
2003
IEEE
122views Hardware» more  ISCAS 2003»
15 years 2 months ago
Reducing the number of variable movements in exact BDD minimization
Ordered Binary Decision Diagrams (BDDs) are frequently used in logic synthesis. In this paper a new exact BDD minimization algorithm is presented, which is based on state space se...
Rüdiger Ebendt
VLSID
2007
IEEE
94views VLSI» more  VLSID 2007»
15 years 10 months ago
A Reduced Complexity Algorithm for Minimizing N-Detect Tests
? We give a new recursive rounding linear programming (LP) solution to the problem of N-detect test minimzation. This is a polynomialtime solution that closely approximates the exa...
Kalyana R. Kantipudi, Vishwani D. Agrawal
APN
1999
Springer
15 years 1 months ago
Structural Methods to Improve the Symbolic Analysis of Petri Nets
Abstract. Symbolic techniques based on BDDs (Binary Decision Diagrams) have emerged as an e cient strategy for the analysis of Petri nets. The existing techniques for the symbolic ...
Enric Pastor, Jordi Cortadella, Marco A. Peñ...
TCAD
1998
125views more  TCAD 1998»
14 years 9 months ago
BDD-based synthesis of extended burst-mode controllers
Abstract—We examine the implications of a new hazard-free combinational logic synthesis method [1], which generates multiplexor-based networks from binary decision diagrams (BDDs...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
ICCAD
1994
IEEE
114views Hardware» more  ICCAD 1994»
15 years 1 months ago
Performance-driven synthesis of asynchronous controllers
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...