1287 search results - page 246 / 258 » Reduction of Timed Hybrid Systems |
71
Voted
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
VTC
2008
IEEE
15 years 4 months ago
2008
IEEE
— Transmit preprocessing employed at the basestation (BS) has been proposed for simplifying the design of the mobile receiver. Provided that the channel impulse response (CIR) of...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
CASES
2001
ACM
15 years 1 months ago
2001
ACM
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
ISLPED
1995
ACM
15 years 1 months ago
1995
ACM
The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...