76 search results - page 14 / 16 » Redundancy in Instruction Sequences of Computer Programs |
DSN
2002
IEEE
15 years 4 months ago
2002
IEEE
A virtual duplex system (VDS) can be used to increase safety without the use of structural redundancy on a single machine. If a deterministic program P is calculating a given func...
ITICSE
1999
ACM
15 years 4 months ago
1999
ACM
This paper shows how a multimedia multi-framed simulation generator was developed. A technique of recording a sequence of steps and playing them back as an animation overcomes the...
132
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IWOMP
2007
Springer
15 years 6 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
124
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TJS
2002
14 years 11 months ago
2002
Historically, compilers have operated by applying a fixed set of optimizations in a predetermined order. We call such an ordered list of optimizations a compilation sequence. This...
109
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ICS
2003
Tsinghua U.
15 years 5 months ago
2003
Tsinghua U.
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...