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DSD
2008
IEEE
124views Hardware» more  DSD 2008»
15 years 9 months ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
IOLTS
2008
IEEE
102views Hardware» more  IOLTS 2008»
15 years 9 months ago
Integrating Scan Design and Soft Error Correction in Low-Power Applications
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
Michael E. Imhof, Hans-Joachim Wunderlich, Christi...
IROS
2008
IEEE
131views Robotics» more  IROS 2008»
15 years 9 months ago
OpenRDK: A modular framework for robotic software development
— Intense efforts to define a common structure in robotic applications, both from a conceptual and from an implementation point of view, have been carried out in the last years ...
Daniele Calisi, Andrea Censi, Luca Iocchi, Daniele...
CIDM
2007
IEEE
15 years 9 months ago
Prediction of Abnormal Behaviors for Intelligent Video Surveillance Systems
–The OBSERVER is a video surveillance system that detects and predicts abnormal behaviors aiming at the intelligent surveillance concept. The system acquires color images from a ...
Duarte Duque, Henrique Santos, Paulo Cortez
GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
15 years 9 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...