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ISLPED
2009
ACM
123views Hardware» more  ISLPED 2009»
13 years 11 months ago
Predict and act: dynamic thermal management for multi-core processors
In this paper, we propose a proactive dynamic thermal management scheme for chip multiprocessors that run multi-threaded workloads. We introduce a new predictor that utilizes the ...
Raid Zuhair Ayoub, Tajana Simunic Rosing
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 3 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
13 years 10 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
HPCA
2008
IEEE
14 years 6 months ago
Runahead Threads to improve SMT performance
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
Tanausú Ramírez, Alex Pajuelo, Olive...
INFOCOM
2009
IEEE
14 years 27 days ago
Power-Aware Speed Scaling in Processor Sharing Systems
—Energy use of computer communication systems has quickly become a vital design consideration. One effective method for reducing energy consumption is dynamic speed scaling, whic...
Adam Wierman, Lachlan L. H. Andrew, Ao Tang