199 search results - page 23 / 40 » Register pointer architecture for efficient embedded process... |
109
click to vote
DDECS
2008
IEEE
15 years 1 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
116
click to vote
CF
2004
ACM
15 years 5 months ago
2004
ACM
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...
110
click to vote
CODES
2000
IEEE
15 years 4 months ago
2000
IEEE
In this paper we present an approach to performance estimation for hard real-time systems. We consider architectures consisting of multiple processors. The scheduling policy is ba...
116
click to vote
FPL
2006
Springer
15 years 3 months ago
2006
Springer
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
106
click to vote
EUROPAR
2009
Springer
15 years 3 months ago
2009
Springer
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...