199 search results - page 31 / 40 » Register pointer architecture for efficient embedded process... |
JSA
2000
14 years 11 months ago
2000
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
CODES
2006
IEEE
15 years 5 months ago
2006
IEEE
For modern embedded systems, the complexity of embedded applications has reached a point where the performance requirements of these applications can no longer be supported by emb...
108
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CASES
2006
ACM
15 years 3 months ago
2006
ACM
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
100
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ERSA
2006
15 years 1 months ago
2006
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
DAC
2005
ACM
16 years 24 days ago
2005
ACM
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Langua...