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WWW
2010
ACM
15 years 9 months ago
A client-server architecture for state-dependent dynamic visualizations on the web
As sophisticated enterprise applications move to the Web, some advanced user experiences become difficult to migrate due to prohibitively high computation, memory, and bandwidth r...
Daniel Coffman, Danny Soroker, Chandra Narayanaswa...
ISPASS
2009
IEEE
15 years 8 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
CODES
2008
IEEE
15 years 8 months ago
Distributed flit-buffer flow control for networks-on-chip
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
Nicola Concer, Michele Petracca, Luca P. Carloni
CODES
2008
IEEE
15 years 8 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
MICRO
2008
IEEE
103views Hardware» more  MICRO 2008»
15 years 8 months ago
Testudo: Heavyweight security analysis via statistical sampling
Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Tradi...
Joseph L. Greathouse, Ilya Wagner, David A. Ramos,...