1179 search results - page 20 / 236 » Relative Timing Based Verification of Timed Circuits and Sys... |
84
Voted
RTSS
1996
IEEE
15 years 1 months ago
1996
IEEE
We propose a method for reducing the number of clocks of a timed automaton by combining two algorithms. The first one consists in detecting active clocks, that is, those clocks wh...
101
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ASPDAC
2001
ACM
15 years 1 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
83
Voted
DSD
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
111
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CL
2008
Springer
14 years 9 months ago
2008
Springer
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
83
Voted
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...