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DAC
2009
ACM
16 years 23 days ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
ICETE
2004
204views Business» more  ICETE 2004»
15 years 1 months ago
A Real-Time Intrusion Prevention System for Commercial Enterprise Databases
: - Modern intrusion detection systems are comprised of three basically different approaches, host based, network based, and a third relatively recent addition called procedural ba...
Ulf T. Mattsson
ASYNC
2004
IEEE
98views Hardware» more  ASYNC 2004»
15 years 3 months ago
Synthesis of Speed Independent Circuits Based on Decomposition
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...
Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers
ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
15 years 4 months ago
Deterministic Test Pattern Generation Techniques for Sequential Circuits
This paper presents new test generation techniques for improving the average-case performance of the iterative logic array based deterministic sequential circuit test generation a...
Ilker Hamzaoglu, Janak H. Patel
76
Voted
CHARME
2003
Springer
120views Hardware» more  CHARME 2003»
15 years 3 months ago
A Compositional Theory of Refinement for Branching Time
Abstract. I develop a compositional theory of refinement for the branching time framework based on stuttering simulation and prove that if one system refines another, then a refine...
Panagiotis Manolios