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CMSB
2006
Springer
15 years 1 months ago
Incorporating Time Delays into the Logical Analysis of Gene Regulatory Networks
Based on the logical description of gene regulatory networks developed by R. Thomas, we introduce an enhanced modelling approach that uses timed automata. It yields a refined quali...
Heike Siebert, Alexander Bockmayr
FUIN
2007
110views more  FUIN 2007»
14 years 9 months ago
Controllable Delay-Insensitive Processes
Abstract. Josephs and Udding’s DI-Algebra offers a convenient way of specifying and verifying designs that must rely upon delay-insensitive signalling between modules (asynchrono...
Mark B. Josephs, Hemangee K. Kapoor
TVLSI
2008
78views more  TVLSI 2008»
14 years 9 months ago
Minimal-Power, Delay-Balanced Smart Repeaters for Global Interconnects in the Nanometer Regime
Abstract--A SMART repeater is proposed for driving capacitively-coupled, global-length on-chip interconnects that alters its drive strength dynamically to match the relative bit pa...
Roshan Weerasekera, Dinesh Pamunuwa, Li-Rong Zheng...
DATE
2005
IEEE
116views Hardware» more  DATE 2005»
15 years 3 months ago
Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition
This paper addresses two problems related to disjointsupport decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results...
Andrés Martinelli, Elena Dubrova
PACT
2005
Springer
15 years 3 months ago
Minimizing Hotspot Delay by Fully Utilizing the Link Bandwidth on 2D Mesh with Virtual Cut-Through Switching
Abstract. The hotspot seriously degrades the performance of a parallel algorithm but there have not been many methods proposed for this problem. Without modification of mesh topolo...
MinHwan Ok, Myong-Soon Park