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ISCAS
2006
IEEE
93views Hardware» more  ISCAS 2006»
15 years 5 months ago
A low-power clock frequency multiplier
A low-power output feedback controlled frequency synthesizer. Our proposed circuit can be used for low-power multiplier is proposed for Delay Locked Loop (DLL) based application an...
Md. Ibrahim Faisal, Magdy A. Bayoumi, Peiyi Zhao
ATS
2000
IEEE
134views Hardware» more  ATS 2000»
15 years 4 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
GCC
2003
Springer
15 years 5 months ago
A Collaborative Multimedia Authoring System
We developed a SMIL-based collaborative multimedia authoring tool supporting a mechanism for conceptually representing the temporal relations between different media. Among the ma...
Mee Young Sung, Do Hyung Lee
TASLP
2011
14 years 6 months ago
Speaker Diarization Based on Intensity Channel Contribution
The time delay of arrival (TDOA) between multiple microphones has been used since 2006 as a source of information (localization) to complement the spectral features for speaker di...
Roberto Barra-Chicote, José Manuel Pardo, J...

Publication
198views
16 years 10 months ago
QoS and Multipoint support for Multimedia Applications over the ATM ABR Service
Multimedia applications with stringent delay requirements are usually supported by the constant bit rate (CBR) or real-time variable bit rate VBR (rt-VBR) service categories of ATM...
Bobby Vandalore, Sonia Fahmy, Raj Jain, Rohit Goya...