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ICCAD
2001
IEEE
128views Hardware» more  ICCAD 2001»
15 years 8 months ago
An Assembly-Level Execution-Time Model for Pipelined Architectures
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...
CCGRID
2008
IEEE
15 years 6 months ago
Data Consolidation: A Task Scheduling and Data Migration Technique for Grid Networks
In this work we examine a task scheduling and data migration problem for Grid Networks, which we refer to as the Data Consolidation (DC) problem. DC arises when a task needs for i...
Panagiotis C. Kokkinos, Kostas Christodoulopoulos,...
ICC
2008
IEEE
117views Communications» more  ICC 2008»
15 years 6 months ago
Proactive Power Optimization of Sensor Networks
—We propose a reduced-complexity genetic algorithm for dynamic deployment of resource constrained multi-hop mobile sensor networks. The goal of this paper is to achieve optimal c...
Rahul Khanna, Huaping Liu, Hsiao-Hwa Chen
VTC
2008
IEEE
146views Communications» more  VTC 2008»
15 years 6 months ago
How Typical is the "Typical Urban" channel model?
— Channel models for urban deployments are among the most commonly used in research, standardization, and dimensioning of cellular networks. The time dispersion has ever been an ...
Henrik Asplund, Kjell Larsson, Peter Ökvist
ICASSP
2007
IEEE
15 years 6 months ago
Fundamental Detection and Estimation Limits in Spike Sorting
Spike sorting refers to the detection and classification of electric potentials (spikes) from multi-neuron recordings, a difficult but essential pre-processing step before neura...
Mona A. Sheikh, Don H. Johnson