Sciweavers

675 search results - page 118 / 135
» Reliability-Aware Design Optimization for Multiprocessor Emb...
Sort
View
CASES
2006
ACM
15 years 5 months ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
CSIE
2009
IEEE
15 years 6 months ago
An Improved Algorithm of Digital Watermarking Based on Wavelet Transform
In this paper, a digital image watermarking technique based on Discrete Wavelet Transform (DWT) will be proposed. This scheme is designed utilizing principles deriving from the hu...
Jianhong Sun, Junsheng Li, Zhiyong Li
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
15 years 6 months ago
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
CP
2000
Springer
15 years 4 months ago
Constraint-Based Agents: The ABC's of CBA's
The Constraint-Based Agent (CBA) framework is a set of tools for designing, simulating, building, verifying, optimizing, learning and debugging controllers for agents embedded in a...
Alan K. Mackworth
EURODAC
1994
IEEE
120views VHDL» more  EURODAC 1994»
15 years 3 months ago
Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay
Clock routing has become a critical issue in the layout design of high-performance systems. We show that the two passes bottom-up and top-down of the DME algorithm 2, 3, 4, 8 can ...
Chung-Wen Albert Tsao, Andrew B. Kahng