Sciweavers

174 search results - page 12 / 35
» Reliability-Centric High-Level Synthesis
Sort
View
107
Voted
DATE
2003
IEEE
138views Hardware» more  DATE 2003»
15 years 9 months ago
Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric
There have been several recent attempts to include duplication-based on-line testability in behaviourally synthesized designs. In this paper, on-line testability is considered wit...
Petros Oikonomakos, Mark Zwolinski, Bashir M. Al-H...
133
Voted
ICES
2003
Springer
151views Hardware» more  ICES 2003»
15 years 8 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...
144
Voted
DATE
2000
IEEE
139views Hardware» more  DATE 2000»
15 years 8 months ago
Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
136
Voted
ICCAD
2001
IEEE
143views Hardware» more  ICCAD 2001»
16 years 16 days ago
Transient Power Management Through High Level Synthesis
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
Vijay Raghunathan, Srivaths Ravi, Anand Raghunatha...
122
Voted
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
15 years 9 months ago
Power Constrained High-Level Synthesis of Battery Powered Digital Systems
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
S. F. Nielsen, Jan Madsen