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» Reliability-Centric High-Level Synthesis
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76
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ASPDAC
2006
ACM
114views Hardware» more  ASPDAC 2006»
15 years 6 months ago
High level equivalence symmetric input identification
Symmetric input identification is an important technique in logic synthesis. Previous approaches deal with this problem by building BDDs and developing algorithms to determine symm...
Ming-Hong Su, Chun-Yao Wang
MEMOCODE
2007
IEEE
15 years 6 months ago
From WiFi to WiMAX: Techniques for High-Level IP Reuse across Different OFDM Protocols
Orthogonal Frequency-Division Multiplexing (OFDM) has become the preferred modulation scheme for both broadband and high bitrate digital wireless protocols because of its spectral...
Man Cheuk Ng, Muralidaran Vijayaraghavan, Nirav Da...
ICCAD
2000
IEEE
159views Hardware» more  ICCAD 2000»
15 years 4 months ago
ACTIF: A High-Level Power Estimation Tool for Analog Continuous-Time-Filters
A tool is presented that gives a high-level estimation of the power consumed by an analog continuous-time OTA-C filter when given only high-level input parameters such as dynamic ...
Erik Lauwers, Georges G. E. Gielen
103
Voted
DAC
1999
ACM
15 years 4 months ago
Common-Case Computation: A High-Level Technique for Power and Performance Optimization
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S...
ISPD
2012
ACM
252views Hardware» more  ISPD 2012»
13 years 8 months ago
Towards layout-friendly high-level synthesis
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
Jason Cong, Bin Liu 0006, Guojie Luo, Raghu Prabha...