Sciweavers

174 search results - page 18 / 35
» Reliability-Centric High-Level Synthesis
Sort
View
155
Voted
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
14 years 4 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
15 years 4 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
ICCAD
1994
IEEE
200views Hardware» more  ICCAD 1994»
15 years 4 months ago
Techniques for crosstalk avoidance in the physical design of high-performance digital systems
Interconnectperformance does not scale well into deep submicron dimensions, and the rising number of analog effects erodes tal abstraction necessary for high levels of integration...
Desmond Kirkpatrick, Alberto L. Sangiovanni-Vincen...
FM
1999
Springer
121views Formal Methods» more  FM 1999»
15 years 4 months ago
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology
ÐIn this paper, we describe the incremental specification of a power transformer station controller using a controller synthesis methodology. We specify the main requirements as s...
Hervé Marchand, Mazen Samaan
ASAP
1996
IEEE
145views Hardware» more  ASAP 1996»
15 years 4 months ago
A Synthesis System For Bus-Based Wavefront Array Architectures
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
Reiner W. Hartenstein, Jürgen Becker, Michael...