174 search results - page 23 / 35 » Reliability-Centric High-Level Synthesis |
106
Voted
RSP
2005
IEEE
15 years 6 months ago
2005
IEEE
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
94
Voted
ICCAD
1991
IEEE
15 years 4 months ago
1991
IEEE
In a high level synthesis environment there is a strong need for flexible module generators. For the generation of regular structures efficient dedicated module generators can be ...
113
Voted
ICCAD
2003
IEEE
15 years 9 months ago
2003
IEEE
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
124
click to vote
ICCAD
2007
IEEE
15 years 4 months ago
2007
IEEE
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
87
Voted
ASPDAC
2008
ACM
15 years 2 months ago
2008
ACM
We propose REWIRED (REgister Write Inhibition by REsource Dedication), a technique for reducing power during high level synthesis (HLS) by selectively inhibiting the storage of fun...