s, and abstractions, typically enabling faster development times than with traditional Hardware ion Languages (HDLs). However, programming at a higher level of abstraction is typic...
John Curreri, Seth Koehler, Alan D. George, Brian ...
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
— The worst-case delay/power of function units has been used in traditional high level synthesis to facilitate design space exploration. As technology scales to nanometer regime,...
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahm...